A Fully Digital SRAM-Based Four-Layer In-Memory Computing Unit Achieving Multiplication Operations and Results Store-Reference-Cited by-同舟云学术

A Fully Digital SRAM-Based Four-Layer In-Memory Computing Unit Achieving Multiplication Operations and Results Store

Published:2023-06 Issue:6 Volume:31 Page:776-788
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Lin Zhiting¹^ORCID,Zhang Shaoying¹^ORCID,Jin Qian¹,Xia Jianping¹,Liu Yunwei¹,Yu Kefeng¹,Zheng Jian¹,Xu Xiaoming¹,Fan Xing¹,Li Ke¹^ORCID,Tong Zhongzhen²^ORCID,Wu Xiulong¹^ORCID,Lu Wenjuan¹^ORCID,Peng Chunyu¹^ORCID,Zhao Qiang¹^ORCID

Affiliation:

1. School of Integrated Circuits, Anhui University (AHU), Hefei, China

2. School of Integrated Circuit Science and Engineering, Beihang University, Beijing, China

Funder

National Natural Science Foundation of China

State Key Program of the National Natural Science Foundation of China

National Key Research and Development Program of China

Joint Funds of the National Natural Science Foundation of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/92/10129243/10109679.pdf?arnumber=10109679

Reference37 articles.

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2. A 42pJ/decision 3.12TOPS/W robust in-memory machine learning classifier with on-chip training

3. IMAC: In-Memory Multi-Bit Multiplication and ACcumulation in 6T SRAM Array

4. An 89 TOPS/W and 16.3 TOPS/mm2 all-digital SRAM-based full-precision compute-in memory macro in 22 nm for machine-learning edge applications;chih;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2021

5. A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors

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