A Fully Digital SRAM-Based Four-Layer In-Memory Computing Unit Achieving Multiplication Operations and Results Store

Author:

Lin Zhiting1ORCID,Zhang Shaoying1ORCID,Jin Qian1,Xia Jianping1,Liu Yunwei1,Yu Kefeng1,Zheng Jian1,Xu Xiaoming1,Fan Xing1,Li Ke1ORCID,Tong Zhongzhen2ORCID,Wu Xiulong1ORCID,Lu Wenjuan1ORCID,Peng Chunyu1ORCID,Zhao Qiang1ORCID

Affiliation:

1. School of Integrated Circuits, Anhui University (AHU), Hefei, China

2. School of Integrated Circuit Science and Engineering, Beihang University, Beijing, China

Funder

National Natural Science Foundation of China

State Key Program of the National Natural Science Foundation of China

National Key Research and Development Program of China

Joint Funds of the National Natural Science Foundation of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Computing In-Memory Multibit Multiplication Based on Decoupling and In-Array Storing;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-08

2. RDCIM: RISC-V Supported Full-Digital Computing-in-Memory Processor With High Energy Efficiency and Low Area Overhead;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-04

3. FP-BMAC: Efficient Approximate Floating-Point Bit-Parallel MAC Processor using IMC;2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID);2024-01-06

4. An Efficient Two-Stage Pipelined Compute-in-Memory Macro for Accelerating Transformer Feed-Forward Networks;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024

5. TensorCache: Reconstructing Memory Architecture With SRAM-Based In-Cache Computing for Efficient Tensor Computations in GPGPUs;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-12

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