Impact of Device Parameters on the Threshold Voltage of Double-Gate, Tri-Gate and Gate-All-Around MOSFETs
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/8765317/8770219/08770425.pdf?arnumber=8770425
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Si Interlayers Trimming Strategy in Gate-All-Around Device Architecture for Si and SiGe Dual-Channel CMOS Integration;IEEE Transactions on Electron Devices;2023-12
2. A Study on influence of geometric parameters in Gate All Around Transistors;2023 2nd International Conference on Advancements in Electrical, Electronics, Communication, Computing and Automation (ICAECA);2023-06-16
3. Small signal model parameter extraction for cylindrical silicon-on-insulator Schottky barrier MOSFET;Microsystem Technologies;2023-04
4. Temperature-Dependent Characteristics and Electrostatic Threshold Voltage Tuning of Accumulated Body MOSFETs;IEEE Transactions on Electron Devices;2022-08
5. Quantum ATK analysis of silicon nanowire FET with a cylindrical metallic wrap-around gate varied with dielectrics;Materials Today: Proceedings;2022
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