Author:
Gaur Tripti,Sharma Rahul,Chaujar Rishu
Reference18 articles.
1. Study and simulation of silicon nanowire field effect transistor at subthreshold conditions using high k dielectric layer at room temperature;Ganesh;GESJ: Physics,2010
2. Fabrication and characterization of silicon nanowire p-i-n MOS gated diode for use as p-type tunnel FET