Pre-processing power traces to defeat random clocking countermeasures
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/7152138/7168553/07168576.pdf?arnumber=7168576
Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A Unified and Fully Automated Framework for Wavelet-Based Attacks on Random Delay;IEEE Transactions on Computers;2024-09
2. An Efficient Hiding Countermeasure with Xilinx MMCM Primitive in Spread Mode;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
3. Transition Factors of Power Consumption Models for CPA Attacks on Cryptographic RISC-V SoC;IEEE Transactions on Computers;2023-09-01
4. Dynamic Gold Code-Based Chaotic Clock for Cryptographic Designs to Counter Power Analysis Attacks;Proceedings of the Great Lakes Symposium on VLSI 2023;2023-06-05
5. Compacting Side-Channel Measurements With Amplitude Peak Location Algorithm;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023
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