An Efficient Hiding Countermeasure with Xilinx MMCM Primitive in Spread Mode
Author:
Affiliation:
1. University of Electro-Communications (UEC),Tokyo,Japan
2. Le Quy Don Technical University,Hanoi,Vietnam
3. Ho Chi Minh University of Science,Ho Chi Minh City,Vietnam
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10557746/10557828/10558293.pdf?arnumber=10558293
Reference19 articles.
1. Dual-Hiding Side-Channel-Attack Resistant FPGA-Based Asynchronous-Logic AES: Design, Countermeasures and Evaluation
2. Information Leakage Analysis using a Co-design-Based Fault Injection Technique on a RISC-V Microprocessor
3. SCRIP: Secure Random Clock Execution on Soft Processor Systems to Mitigate Power-based Side Channel Attacks
4. Correlation Power Analysis Attack Resisted Cryptographic RISC-V SoC With Random Dynamic Frequency Scaling Countermeasure
5. Pre-processing power traces to defeat random clocking countermeasures
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