Offset voltage analysis of dynamic latched comparator
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/6019810/6026262/06026358.pdf?arnumber=6026358
Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Ultra-low power 10-bit 50–90 MSps SAR ADCs in 65 nm CMOS for multi-channel ASICs;Journal of Instrumentation;2024-01-01
2. Design of Dynamic Latched Comparator Using the Offset Calibration Technique;2023 3rd International Conference on Smart Generation Computing, Communication and Networking (SMART GENCON);2023-12-29
3. An ultra-low power 10-bit, 50 MSps SAR ADC for multi-channel readout ASICs;Journal of Instrumentation;2023-11-01
4. Common-Gate Zero Current Detector with Body-Voltage Based Offset Compensation;2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME);2023-06-18
5. Modify two stage OPAMP based on offset constellation technique;AIP Conference Proceedings;2023
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