Flip chip interconnect systems using wire stud bumps and lead free solder-Reference-Cited by-同舟云学术

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Flip chip interconnect systems using wire stud bumps and lead free solder

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Container-title:2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)
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Author:

Zama S.,Baldwin D.F.,Hikami T.,Murata H.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/6887/18541/00853310.pdf?arnumber=853310

Cited by 11 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Development of Flip-Chip Packaging for Monolithic Microwave Integrated Circuit;2023 IEEE 25th Electronics Packaging Technology Conference (EPTC);2023-12-05

2. The Bonding Forming Simulation and Reliability Research of the Flip-Chip Stacked Gold Stud Bump;IEEE Transactions on Components, Packaging and Manufacturing Technology;2017-01

3. Aging treatment characteristics of solder bump joint for high reliability optical module;Thin Solid Films;2004-09

4. Microstructure and strength of bump joints in photodiode packages;Journal of Electronic Materials;2004-01

5. Microstructure characterization of Sn-Ag solder joints between stud bumps and metal pads;Journal of Electronic Materials;2003-12

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