Development of multi-stack process on wafer-on-wafer (WOW)

Author:

Fujimoto Koji,Maeda Nobuhide,Kitada Hideki,Kim Youngsuk,Kawai Akihito,Arai Kazuhisa,Nakamura Tomoji,Suzuki Kousuke,Ohba Takayuki

Publisher

IEEE

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. 3D Integration;Fan-Out Wafer-Level Packaging;2018

2. IC Packaging: 3D IC Technology and Methods;Lecture Notes in Electrical Engineering;2017

3. Overview and Outlook of Three-Dimensional Integrated Circuit Packaging, Three-Dimensional Si Integration, and Three-Dimensional Integrated Circuit Integration;Journal of Electronic Packaging;2014-10-15

4. Co2 Accounting and Abatement: An Approach for Iron and Steel Industry;Transactions of the Indian Institute of Metals;2013-07-03

5. Reliability of key technologies in 3D integration;Microelectronics Reliability;2013-01

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