Author:
Kumar Adesh,Verma Gaurav,Nath Vijay,Choudhury Sushabhan
Reference16 articles.
1. Banijamali B, Ramalingam S, Nagarajan K, Chaware R (2011) Advanced reliability study of TSV interposers and interconnects for the 28 nm technology FPGA. In: Proceedings of Electronic components and technology conference (ECTC)
2. Kitada H, Maeda N, Fujimoto K, Mizushima Y, Nakata Y, Nakamura T et al (2010) Stress and diffusion resistance of low temperature CVD dielectrics for multi- TSVs on bumpless wafer-on-wafer (WOW) technology. In: Advanced metallization conference
3. Fujimoto K et al (2010) Development of multi-stack process on wafer-on-wafer (WoW). In: The IEEE CPMT symposium Japan
4. Nimura M, Mizuno J, Shigetou A, Sakuma K, Ogino H, Enomoto T, Shoji S (2013) Study on hybrid Au–underfill resin bonding method with lock-and-key structure for 3-D integration. IEEE Trans Compon Packag Manuf Technol 3(4):558–565
5. Beyne E (2007) IMEC Kapeldreef 75,3001 Leuven “Tutorial T7A: Advanced IC packaging”. In: 20th International Conference on VLSI Design (VLSID’07), 2007, p 1
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