A New High-Density Twin-Gate Isolation One-Time Programmable Memory Cell in Pure 28-nm CMOS Logic Process-Reference-Cited by-同舟云学术

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A New High-Density Twin-Gate Isolation One-Time Programmable Memory Cell in Pure 28-nm CMOS Logic Process

Published:2015-01 Issue:1 Volume:62 Page:121-127
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Hsiao Woan Yun,Peng Ping Chun,Chang Tzong-Sheng,Chih Yu-Der,Tsai Wu-Chin,Chang Meng-Fan,Chien Tun-Fei,King Ya-Chin,Lin Chrong-Jung

Funder

National Science Council

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/16/6994894/06971110.pdf?arnumber=6971110

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 4Kx8 Innovative Fuse OTP on 22-nm FD-SOI;IEEE Journal of the Electron Devices Society;2019

2. One Time Programmable Antifuse Memory Based on Bulk Junctionless Transistor;IEEE Electron Device Letters;2018-08

3. P-channel differential multiple-time programmable memory cells by laterally coupled floating metal gate fin field-effect transistors;Japanese Journal of Applied Physics;2018-03-22

4. Nanomechanical Encoding Method Using Enhanced Thermal Concentration on a Metallic Nanobridge;ACS Nano;2017-07-24

5. Differential multiple-time-programmable memory cells by laterally coupled floating metal gate fin field-effect transistors;Japanese Journal of Applied Physics;2017-02-24

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