P-channel differential multiple-time programmable memory cells by laterally coupled floating metal gate fin field-effect transistors
Author:
Publisher
IOP Publishing
Subject
General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering
Link
http://stacks.iop.org/1347-4065/57/i=4S/a=04FE14/pdf
Reference32 articles.
1. A Novel Embedded OTP NVM Using Standard Foundry CMOS Logic Technology
2. A New High-Density Twin-Gate Isolation One-Time Programmable Memory Cell in Pure 28-nm CMOS Logic Process
3. High Density MTP Logic NVM for Power Management Applications
4. A New 2T Contact Coupling Gate MTP Memory in Fully CMOS Compatible Process
5. A High-Density MTP Cell With Contact Coupling Gates by Pure CMOS Logic Process
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