Reliability Improvement of 3.3 kV Full-SiC Power Modules for Power Cycling Tests With Sintered Copper Die Attach Technology
Author:
Affiliation:
1. Department of Design Development Division, Hitachi Power Semiconductor Device Ltd., Hitachi, Japan
2. Division of Electric, Electronics and Information Engineering, Graduate School of Engineering, Osaka University, Suita, Japan
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/5503870/10287668/10239515.pdf?arnumber=10239515
Reference31 articles.
1. Power cycling issues and challenges of SiC-MOSFET power modules in high temperature conditions
2. Degradation Assessment and Precursor Identification for SiC MOSFETs Under High Temp Cycling
3. Power Cycling Capability Comparison of Si and SiC MOSFETs under Different Conduction Modes
4. Power cycling methods for SiC MOSFETs
5. Temperature change induced degradation of SiC MOSFET devices
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1. Low-temperature copper sinter-joining technology for power electronics packaging: A review;Journal of Materials Processing Technology;2024-11
2. Review on Power Cycling Reliability of SiC Power Device;Electronic Materials;2024-06-10
3. Review on Shear Strength and Reliability of Nanoparticle Sintered Joints for Power Electronics Packaging;Journal of Electronic Materials;2024-03-29
4. Power Cycling Modeling and Lifetime Evaluation of SiC Power MOSFET Module Using a Modified Physical Lifetime Model;IEEE Transactions on Device and Materials Reliability;2024-03
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