Arsenic/phosphorus LDD optimization by taking advantage of phosphorus transient enhanced diffusion for high voltage input/output CMOS devices-Reference-Cited by-同舟云学术

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Arsenic/phosphorus LDD optimization by taking advantage of phosphorus transient enhanced diffusion for high voltage input/output CMOS devices

Published:2002 Issue:1 Volume:49 Page:67-71
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Wang H.C.-H.,Chih-Chiang Wang ,Diaz C.H.,Boon-Khim Liew ,Sun J.Y.-C.,Tahui Wang

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx5/16/21019/00974751.pdf?arnumber=974751

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