Integrating Chiplets using Chips First Ultra-High-Density Fan-out with Maskless Laser Direct Imaging and Adaptive Patterning for High Performance Computing

Author:

Jose Benedict San1,Sandstrom Cliff1,Talain Erick1,Kellar Jan1,Olson Tim1,Melgo Mary Maye2,Gacho Rizi2,Kim BC2

Affiliation:

1. Deca Technologies Inc.,Tempe,AZ,USA

2. nepes hayyim Corporation,Laguna,Philippines

Publisher

IEEE

Reference10 articles.

1. Deca & Cadence Breakthrough Heterogeneous Integration Barriers with Adaptive Patterning™

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3. Embedded Multi-die Interconnect Bridge (EMIB) -- A High Density, High Bandwidth Packaging Interconnect

4. M-Series Fan-Out with Adaptive Patterning;olson;Advances in Embedded and Fan-Out Wafer Level Packaging Technologies,2018

5. Post-Moore's Law electronics: now until quantum electronics;Chip Scale Review,2020

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1. Transcending the Reticle Limit in On-Wafer Die Integration and Advanced Packaging: Full-Wafer Patterning with High-Productivity Electron Beam Lithography;2024 IEEE 74th Electronic Components and Technology Conference (ECTC);2024-05-28

2. Ultra Thin Fan-Out 3D WLCSP Heterogeneous Integration Packaging;2024 IEEE 74th Electronic Components and Technology Conference (ECTC);2024-05-28

3. Deca & ASE M-Series Bridge Die Compensation & Adaptive Patterning in a Multi-Die Module in 600 mm Format;2023 IEEE 25th Electronics Packaging Technology Conference (EPTC);2023-12-05

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