Reliability Challenges of High-Density Fan-out Packaging for High-Performance Computing Applications
Author:
Affiliation:
1. MediaTek Inc,San Jose,CA,USA
2. MediaTek Inc,Hsinchu,Taiwan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9816066/9816372/09816379.pdf?arnumber=9816379
Reference7 articles.
1. Wafer-Level Integration of an Advanced Logic-Memory System Through the Second-Generation CoWoS Technology
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4. Advanced packaging with greater simplicity
5. RDL layout pattern reliability analysis and optimization with TCAD stress modeling
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