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A Novel Lateral DMOS Transistor With H-Shape Shallow-Trench-Isolation Structure

  • Published:2018-11 Issue:11 Volume:65 Page:5218-5221
  • ISSN:0018-9383
  • Container-title:IEEE Transactions on Electron Devices
  • language:
  • Short-container-title:IEEE Trans. Electron Devices

Author:

Liu Siyang,Ye Ran,Sun WeifengORCID,Shi Longxing

Funder

National Natural Science Foundation of China

Natural Science Foundation of Jiangsu Province

Foundation of State Key Laboratory of Wide-Bandgap Semiconductor Power Electronics Devices

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design and Simulation Optimization of an Ultra-Low Specific On-Resistance LDMOS Device;IEEE Journal of the Electron Devices Society;2024

2. Experiments of a Novel Low-Voltage LDMOS With Ultrashallow Low-Resistance Path Modulated by Bulk Superjunction;IEEE Transactions on Electron Devices;2024-01

3. A Process Optimization Method of the Mini-LOCOS Field Plate Profile for Improving Electrical Characteristics of LDMOS Device;IET Circuits, Devices & Systems;2023-10-31

4. A Novel Lateral Power MOSFET with Ultra-low Energy Consumption and Extraordinary Robustness;2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD);2023-05-28

5. Experimental Investigation of Dual-Gate LDMOS for Low On-Resistance;2022 IEEE 34th International Symposium on Power Semiconductor Devices and ICs (ISPSD);2022-05-22
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