Design of a Novel Encoder for Flash Analog to Digital Converter
Author:
Affiliation:
1. Siddaganga Institute of Technology,VLSI Design and Embedded Systems,Tumakuru,India
2. Siddaganga Institute of Technology,Tumakuru,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9915554/9915796/09915797.pdf?arnumber=9915797
Reference15 articles.
1. A Low Power Reconfigurable Encoder for Flash ADCs
2. Cmos Full Adder and Multiplexer Based Encoder for Low Resolution Flash Adc
3. Design and Analysis of Majority Logic Based Approximate Radix-4 Booth Encoders
4. New efficient designs for XOR and XNOR functions on the transistor level
5. The XOR-MAJ Thermometer-to-Binary Encoder Structure Stable to Bubble Errors
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A 2bit/stage Reusability based methodology for designing 8-bit Binary Search ADC;2023 IEEE Region 10 Symposium (TENSYMP);2023-09-06
2. Design and Implementation of Low Power-Novel Encoder Based Flash ADC;2023 International Conference on Smart Systems for applications in Electrical Sciences (ICSSES);2023-07-07
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