StateReveal: Enabling Checkpointing of FPGA Designs with Buried State
Author:
Attia Sameh,Betz Vaughn
Cited by
3 articles.
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1. DUET: FPGA-Accelerated Differential Testing Framework for Efficient Processor Verification;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10
2. REMU: Enabling Cost-Effective Checkpointing and Deterministic Replay in FPGA-based Emulation;2023 IEEE 41st International Conference on Computer Design (ICCD);2023-11-06
3. ENCORE: Efficient Architecture Verification Framework with FPGA Acceleration;Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays;2023-02-12