Author:
Ratzlaff C.L.,Pillage L.T.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Cited by
88 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Full Stage Delay Calculation Using Full Waveform Propagation and Standard Library CCS Model;2024 25th International Symposium on Quality Electronic Design (ISQED);2024-04-03
2. CMOS substrate RC netlist reduction towards design cycle speed up;AEU - International Journal of Electronics and Communications;2023-11
3. Global Interconnect Optimization;ACM Transactions on Design Automation of Electronic Systems;2023-09-09
4. Leveraging Machine Learning for Gate-level Timing Estimation Using Current Source Models and Effective Capacitance;Proceedings of the Great Lakes Symposium on VLSI 2022;2022-06-06
5. Time Constant Estimate of RC Blocks—An Iterative Method;2021 International Conference on Advanced Technology of Electrical Engineering and Energy (ATEEE);2021-12