1. Simulation of substrate coupling for mobile communications SoC – A 20 GHz VCO case study;Karipidis;AEU - Int J Electron Commun,2023
2. High frequency RFCMOS substrate noise sensor;Moustakas;AEU - Int J Electron Commun,2022
3. CMOS substrate coupling modeling and analysis flow for submicron SoC design;Noulis;Analog Integr Circuits Signal Process,2017
4. Marković Dubravko, Ljuština Dejan, Cvijetić1 Radenko, Ivošević Danko, Rohtek Oliver, Rotim Mario. The Role of Post-Layout Verification in Microprocessor Design. In: Proceedings of MIPRO 2004 27th international convention. 2004.
5. A simple model for digital/analog crosstalk simulation in deep submicron CMOS technology;Liberali,2001