Author:
Jong-Chuang Tsay ,Pen-Yuang Chang
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Signal Processing
Cited by
7 articles.
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1. Latency Analysis in the 2-Dimensional Systolic Arrays for Matrix Multiplication;International Journal of Computers;2021-03-22
2. Learning Sparse Overcomplete Codes for Images;The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology;2006-12-29
3. Learning Sparse Overcomplete Codes for Images;The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology;2006-11
4. Complexity of matrix product on modular linear systolic arrays for algorithms with affine schedules;Journal of Parallel and Distributed Computing;2006-03
5. Mapping full‐systolic arrays for matrix product on XILINX's XC4000(E,EX) FPGAs;COMPEL - The international journal for computation and mathematics in electrical and electronic engineering;2002-03