A Novel 12-Bit 0.6-mW Two-Step Coarse-Fine Time-to-Digital Converter
Author:
Affiliation:
1. School of Integrated Circuits and Electronics, Beijing Institute of Technology, Beijing, China
Funder
Beijing Natural Science Foundation
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/9969381/09793841.pdf?arnumber=9793841
Reference14 articles.
1. Implementation of a High-Precision and Wide-Range Time-to-Digital Converter With Three-Level Conversion Scheme
2. A 2.2-ps Two-Dimensional Gated-Vernier Time-to-Digital Converter With Digital Calibration
3. A Direct-Sampling Pulsed Time-of-Flight Radar With Frequency-Defined Vernier Digital-to-Time Converter in 65 nm CMOS
4. A 3.6 mW, 90 nm CMOS Gated-Vernier Time-to-Digital Converter With an Equivalent Resolution of 3.2 ps
5. A Noise-Shaping Time-to-Digital Converter Using Switched-Ring Oscillators—Analysis, Design, and Measurement Techniques
Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A Two-Stage Interpolation Time-to-Digital Converter Implemented in 20 and 28 nm FGPAs;IEEE Transactions on Industrial Electronics;2024-11
2. A 12-bit, 27.8-ps resolution, Anti-PVT variation multi-parallel sampling based coarse-fine TDC for LiDAR sensors;Microelectronics Journal;2024-01
3. A 4.7-ps Resolution Recirculating Cyclic Vernier TDC Using DWA-Based Mismatch Correction and a Register-Based Time Amplifier;IEEE Transactions on Instrumentation and Measurement;2023
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