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Implementation of a High-Precision and Wide-Range Time-to-Digital Converter With Three-Level Conversion Scheme

  • Published:2017-02 Issue:2 Volume:64 Page:181-185
  • ISSN:1549-7747
  • Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
  • language:
  • Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Wu Jin,Jiang Qi,Song Ke,Zheng LixiaORCID,Sun Dongchen,Sun Weifeng

Funder

Basic Research Program of Jiangsu Province

Natural Science Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 14 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Implementation of a Clock Synchronization Chip Based on Time-to-digital and Digital-to-time Converters With a Shared DLL for Chip-Scale Atomic Clock;2023 IEEE 11th International Conference on Information, Communication and Networks (ICICN);2023-08-17

2. A Resolution-Tunable Low Power Time-to-Digital Converter With an Improved ADDLL Based on a Cyclic Pulse Ring Oscillator;IEEE Transactions on Instrumentation and Measurement;2023

3. A Novel 12-Bit 0.6-mW Two-Step Coarse-Fine Time-to-Digital Converter;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-12

4. Recent Advances and Trends in Voltage-Time Domain Hybrid ADCs;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-06

5. Cost-effective schemes for minimizing the delay dispersion of the comparator in level-crossing ADCs applications;Microelectronics Journal;2022-03
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