1.4-8 Gb/s Low Power Quarter-Rate Single-Loop Referenceless CDR With Unlimited Capture Range
Author:
Affiliation:
1. Department of Electrical and Computer Engineering, Inha University, Incheon, South Korea
2. Point2 Technology, Inc., Seoul, South Korea
Funder
National Research Foundation of Korea
Korea Government
Ministry of Science and ICT (MSIT), Korea
ITRC Support Program, supervised by the IITP
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Link
http://xplorestaging.ieee.org/ielx7/8920/10666887/10474192.pdf?arnumber=10474192
Reference23 articles.
1. A 6.7–11.2 Gb/s, 2.25 pJ/bit, Single-Loop Referenceless CDR With Multi-Phase, Oversampling PFD in 65-nm CMOS
2. A 0.42–3.45 Gb/s Referenceless Clock and Data Recovery Circuit With Counter-Based Unrestricted Frequency Acquisition
3. A 6.5–12.5-Gb/s Half-Rate Single-Loop All-Digital Referenceless CDR in 28-nm CMOS
4. A 4–20-Gb/s 1.87-pJ/b Continuous-Rate Digital CDR Circuit With Unlimited Frequency Acquisition Capability in 65-nm CMOS
5. A 0.32–2.7 Gb/s Reference-Less Continuous-Rate Clock and Data Recovery Circuit With Unrestricted and Fast Frequency Acquisition
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