Multirate Timestamp Modeling for Ultralow-Jitter Frequency Synthesis: A Tutorial-Reference-Cited by-同舟云学术

Multirate Timestamp Modeling for Ultralow-Jitter Frequency Synthesis: A Tutorial

Published:2022-07 Issue:7 Volume:69 Page:3030-3036
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Hu Yizhe¹^ORCID,Siriburanon Teerachot¹^ORCID,Staszewski Robert Bogdan¹^ORCID

Affiliation:

1. School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland

Funder

Science Foundation Ireland

Microelectronic Circuits Centre Ireland (MCCI) through Enterprise Ireland

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/9809796/09765581.pdf?arnumber=9765581

Reference63 articles.

1. Harmonic Oscillators in CMOS—A Tutorial Overview

2. 20.1 a 5.0-to-6.36GHz wideband-harmonic-shaping VCO achieving 196.9 dBc/Hz peak FoM and 90-to-180kHz 1/f3 PN corner without harmonic tuning;guo;Proc IEEE Int Solid-State Circuits Conf (ISSCC),2021

3. Discrete-Time, Linear Periodically Time-Variant Phase-Locked Loop Model for Jitter Analysis

4. A Comprehensive Phase Noise Analysis of Bang-Bang Digital PLLs

5. Time-Variant Modeling and Analysis of Multiplying Delay-Locked Loops

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