Author:
Shilpa C. N.,Shinde Kunjan D.,Nithin H. V.
Cited by
5 articles.
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1. Comparative Analysis of Dynamic Power Consumption of Parallel Prefix Adder;ACM Transactions on Design Automation of Electronic Systems;2024-04-22
2. Efficiency and Speed Trade-Offs in 8-Bit CMOS Adders at 180nm: An In-Depth Examination;2023 IEEE International Conference on Recent Advances in Systems Science and Engineering (RASSE);2023-11-08
3. A 16-bit Brent-Kung Adder scheme for linear array photon counting circuit;5TH INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONIC, COMMUNICATION AND CONTROL ENGINEERING (ICEECC 2021);2023
4. Design and Implementation of 4-bit and 8-bit KSA in 18nm FinFET Technology;2022 IEEE International Students' Conference on Electrical, Electronics and Computer Science (SCEECS);2022-02-19
5. Design of a power-efficient Kogge–Stone adder by exploring new OR gate in 45nm CMOS process;Circuit World;2020-03-23