A 100V gate driver with sub-nanosecond-delay capacitive-coupled level shifting and dynamic timing control for ZVS-based synchronous power converters-Reference-Cited by-同舟云学术

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A 100V gate driver with sub-nanosecond-delay capacitive-coupled level shifting and dynamic timing control for ZVS-based synchronous power converters

Published:2013-09 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the IEEE 2013 Custom Integrated Circuits Conference
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Author:

Liu Zhidong,Lee Hoi

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6648471/6658393/06658482.pdf?arnumber=6658482

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