Implementation of a 32-Bit RISC-V Processor with Cryptography Accelerators on FPGA and ASIC-Reference-Cited by-同舟云学术

Implementation of a 32-Bit RISC-V Processor with Cryptography Accelerators on FPGA and ASIC

Published:2022-07-27 Issue: Volume: Page:
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Container-title:2022 IEEE Ninth International Conference on Communications and Electronics (ICCE)
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Author:

Nguyen-Hoang Duc-Thinh¹,Ma Khai-Minh¹,Le Duy-Linh¹,Thai Hong-Hai¹,Cao Tran-Bao-Thuong¹,Le Duc-Hung¹

Affiliation:

1. University of Science, Vietnam National University,Faculty of Electronics and Telecommunications,Ho Chi Minh City,Vietnam

Publisher

IEEE

Link

Reference7 articles.

2. Cryptosystem An Implementation of RSA Using Verilog;shams;International Journal of Computer Networks and Communications Security,2013

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