Funder
MEXT through the “Next Generation High-Performance Computing Infrastructures and Applications Research and Development Program”
Japan Society for the Promotion of Science (JSPS) KAKENHI
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
General Engineering,General Materials Science,General Computer Science
Cited by
10 articles.
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1. Systolic Array-Based Many-Core Processor with Simultaneous Dual-Instruction Issuance;14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART'24));2024-06-19
2. Scalable dual-instruction multiple-data processing on an efficient systolic-array architecture;2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2024-05-27
3. A 475 MHz Manycore FPGA Accelerator for RTL Simulation;Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays;2024-04
4. A Near-Memory Dynamically Programmable Many-Core Overlay;2023 IEEE 16th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC);2023-12-18
5. A cost/power efficient storage system with directly connected FPGA and SATA disks;2023 IEEE 16th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC);2023-12-18