Fermi-Level Pinning Engineering for Achieving High-Performance Ge-Based Resistive Memory With Ultrahigh Self-Rectifying Ratio (> 10<sup>5</sup>)-Reference-Cited by-同舟云学术

Fermi-Level Pinning Engineering for Achieving High-Performance Ge-Based Resistive Memory With Ultrahigh Self-Rectifying Ratio (> 10⁵)

Published:2022-12 Issue:12 Volume:69 Page:6751-6756
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Ding Xiang¹^ORCID,Wei Na²^ORCID,Qu Yiming¹^ORCID,Lan Zhangsheng¹,Yu Xinwei¹,Yan Chu¹^ORCID,Weng Zeping²,Gao Shifan¹^ORCID,Nishimura Tomonori³,Zhao Liang¹,Lee Choonghyun¹^ORCID,Zhao Yi¹^ORCID

Affiliation:

1. College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, China

2. International Joint Innovation Center, Zhejiang University, Haining, China

3. Department of Materials Engineering, The University of Tokyo, Tokyo, Japan

Funder

Zhejiang Province Natural Science Foundation of China

National Key Research and Development Program of China

Key Research and Development Program of Zhejiang Province

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/16/9967813/09925262.pdf?arnumber=9925262

Reference24 articles.

1. Self-Rectifying and Forming-Free Resistive-Switching Device for Embedded Memory Application

2. High Performance and Self-rectifying Hafnia-based Ferroelectric Tunnel Junction for Neuromorphic Computing and TCAM Applications

3. Ge MOSFETs performance: Impact of Ge interface passivation

4. Suppression of dark current in GeO_x-passivated germanium metal-semiconductor-metal photodetector by plasma post-oxidation

5. Enhancement of high-Ns electron mobility in sub-nm EOT Ge n-MOSFETs;lee;Proc IEEE VLSI Technol Symp,2013

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