1. Adaptive Reconfigurable LFSR: Dynamic Tapping and Reseeding for Enhanced Pseudo Random Number Generation;2024 IEEE International Students' Conference on Electrical, Electronics and Computer Science (SCEECS);2024-02-24
2. A Modular Scan Design Verification approach for Multi-channel Mode;2022 IEEE 3rd International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA);2022-12-15
3. A Proposal for Programmable Pattern Generator and its FPGA implementation;2022 IEEE 3rd International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA);2022-12-15
4. A CUDA-based parallel implementation of a test vectors encoding algorithm in compression-based scan designs;International Journal of Parallel, Emergent and Distributed Systems;2015-03-05