A Wide-Range Mixed-Mode DLL for a Combination 512 Mb 2.0 Gb/s/pin GDDR3 and 2.5 Gb/s/pin GDDR4 SDRAM-Reference-Cited by-同舟云学术

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A Wide-Range Mixed-Mode DLL for a Combination 512 Mb 2.0 Gb/s/pin GDDR3 and 2.5 Gb/s/pin GDDR4 SDRAM

Published:2008-03 Issue:3 Volume:43 Page:631-641
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Lin Feng,Royer Roman A.,Johnson Brian,Keeth Brent

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/4456769/04456782.pdf?arnumber=4456782

Cited by 15 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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2. A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less Clocking;IEEE Journal of Solid-State Circuits;2019-01

3. A Scalable Fully Synthesized Phase-to-Digital Converter for Phase and Duty-Cycle Measurement of High-Speed Clocks;2018 IEEE International Symposium on Circuits and Systems (ISCAS);2018

4. All-digital duty-cycle corrector with synchronous and high accuracy output for double date rate synchronous dynamic random-access memory application;Japanese Journal of Applied Physics;2017-01-30

5. A 0.1–3.5-GHz Duty-Cycle Measurement and Correction Technique in 130-nm CMOS;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2016-05

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