A 75 nm 7 Gb/s/pin 1 Gb GDDR5 Graphics Memory Device With Bandwidth Improvement Techniques-Reference-Cited by-同舟云学术

A 75 nm 7 Gb/s/pin 1 Gb GDDR5 Graphics Memory Device With Bandwidth Improvement Techniques

Published:2010-01 Issue:1 Volume:45 Page:120-133
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Kho Rex,Boursin David,Brox Martin,Gregorius Peter,Hoenigschmid Heinz,Kho Bianka,Kieser Sabine,Kehrer Daniel,Kuzmenka Maksim,Moeller Udo,Petkov Pavel Veselinov,Plan Manfred,Richter Michael,Russell Ian,Schiller Kai,Schneider Ronny,Swaminathan Kartik,Weber Bradley,Weber Julien,Bormann Ingo,Funfrock Fabien,Gjukic Mario,Spirkl Wolfgang,Steffens Holger,Weller JÖrg,Hein Thomas

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/5357544/05357554.pdf?arnumber=5357554

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