STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application-Reference-Cited by-同舟云学术

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STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application

Published:2021-05 Issue: Volume: Page:
ISSN:
Container-title:2021 IEEE International Memory Workshop (IMW)
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Author:

Rao S.,Kim W.,van Beek S.,Kundu S.,Perumkunnil M.,Cosemans S.,Yasin F.,Couet S.,Carpenter R.,O'Sullivan B.J.,Sharifi S. H.,Jossart N.,Souriau L.,Goux L.,Crotti D.,Kar G. S.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9439548/9439588/09439592.pdf?arnumber=9439592

Cited by 16 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Survey On the Sensing Techniques Used for Spin Transfer Torque MRAM;Journal of The Institution of Engineers (India): Series B;2024-07-18

2. A quantum sensing metrology for magnetic memories;npj Spintronics;2024-06-03

3. Design-for-Test for Intermittent Faults in STT-MRAMs;2024 IEEE European Test Symposium (ETS);2024-05-20

4. Demonstration of a manufacturable SOT-MRAM multiplexer array towards industrial applications;Journal of Semiconductors;2023-12-01

5. Distributions of easy axes and reversal processes in patterned MRAM arrays;Scientific Reports;2023-11-22

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