Qualitative Analysis of CMOS Logic Full Adder and GDI Logic Full Adder using 18 nm FinFET Technology-Reference-Cited by-同舟云学术

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Qualitative Analysis of CMOS Logic Full Adder and GDI Logic Full Adder using 18 nm FinFET Technology

Published:2019-10 Issue: Volume: Page:
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Container-title:2019 3rd International Conference on Recent Developments in Control, Automation & Power Engineering (RDCAPE)
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Author:

Bansal Malti,Singh Jasmeet

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8963810/8978995/08979087.pdf?arnumber=8979087

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Implementation of Ripple Carry Adder and Carry Save Adder using 7nm FinFET Technology;WSEAS TRANSACTIONS ON ELECTRONICS;2023-12-31

2. Design and Analysis of Low-Voltage and Low-Power 19T FinFET-TGDI-Based Hybrid Full Adders;Journal of Circuits, Systems and Computers;2023-07-06

3. Design of 4:1 Multiplexer using Gate Diffusion Input Technique and Comparison of Delay and Power Performance with CMOS Logic;2022 14th International Conference on Mathematics, Actuarial Science, Computer Science and Statistics (MACS);2022-11-12

4. A Taxonomical Review of Multiplexer Designs for Electronic Circuits & Devices;June 2021;2021-04-23

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