Steep Switching Si Nanowire p-FETs With Dopant Segregated Silicide Source/Drain at Cryogenic Temperature-Reference-Cited by-同舟云学术

Steep Switching Si Nanowire p-FETs With Dopant Segregated Silicide Source/Drain at Cryogenic Temperature

Published:2022-08 Issue:8 Volume:43 Page:1187-1190
ISSN:0741-3106
Container-title:IEEE Electron Device Letters
language:
Short-container-title:IEEE Electron Device Lett.

Author:

Han Yi¹^ORCID,Sun Jingxuan¹,Richstein Benjamin²^ORCID,Allibert Frederic³^ORCID,Radu Ionut³,Bae Jin-Hee¹^ORCID,Grutzmacher Detlev¹,Knoch Joachim²^ORCID,Zhao Qing-Tai¹^ORCID

Affiliation:

1. PGI-9, Forschungszentrum Jülich, Jülich, Germany

2. Institute of Semiconductor Electronics, RWTH Aachen University, Aachen, Germany

3. SOITEC, Bernin, France

Funder

German Deutsche Forschungsgemeinschaft (DFG) Project [Kryogene CMOS Technologie für die Realisierung von von klassischen QuBit-Kontrollschaltkreisen (Cryo-CMOS)]

China Scholarship Council

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/55/9841091/09804817.pdf?arnumber=9804817

Reference37 articles.

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3. Ultra-Narrow Silicon Nanowire Gate-All-Around CMOS Devices: Impact of Diameter, Channel-Orientation and Low Temperature on Device Performance

4. Characterization and Modeling of 28-nm Bulk CMOS Technology Down to 4.2 K

5. Cryogenic operation of $\Omega$ -gate p-type SiGe-on-insulator nanowire MOSFETs;paz;Proc Joint Int EUROSOI Workshop Int Conf Ultimate Integr Silicon (EUROSOI-ULIS),2018

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