Exploring Multi-level Design to Mitigate Variability and Radiation Effects on 7nm FinFET Logic Cells

Author:

Brendler Leonardo H.,Zimpeck Alexandra L.,Meinhardt Cristina,Reis Ricardo

Publisher

IEEE

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Impact on Radiation Robustness of Gate Mapping in FinFET Circuits under Work-function Fluctuation;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21

2. Design of novel low power architectures of 4:2, 5:2 compressors and 2-bit counter using 7 nm FinFET technology;Journal of Ambient Intelligence and Humanized Computing;2022-12-11

3. General Trade-Offs;Mitigating Process Variability and Soft Errors at Circuit-Level for FinFETs;2021

4. Reliability Challenges in FinFETs;Mitigating Process Variability and Soft Errors at Circuit-Level for FinFETs;2021

5. Circuit design using Schmitt Trigger to reliability improvement;Microelectronics Reliability;2020-11

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