Impact on Radiation Robustness of Gate Mapping in FinFET Circuits under Work-function Fluctuation

Author:

Sandoval Bernardo Borges1,Brendler Leonardo H.2,Kastensmidt Fernanda L.2,Reis Ricardo2,Zimpeck Alexandra L.3,Schvittz Rafael B.4,Meinhardt Cristina1

Affiliation:

1. Universidade Federal de Santa Catarina (UFSC),Departamento de Informática e Estatística

2. Instituto de Informática, PGMICRO/PPGC - Universidade Federal do Rio Grande do Sul (UFRGS)

3. Universidade Católica de Pelotas (UCPel),Centro de Ciências Sociais e Tecnológicas

4. Universidade Federal de Rio Grande (FURG),Centro de Ciências Computacionais

Publisher

IEEE

Reference17 articles.

1. ASAP7: A 7-nm finFET predictive process design kit

2. Exploring gate mapping and transistor sizing to improve radiation robustness: A c17 benchmark case-study;borges sandoval;2021 IEEE 22nd Latin American Test Symposium (LATS),0

3. Analog-digital simulation of transient-induced logic errors and upset susceptibility of an advanced control system;carreno;NASA Technical Memorandum,1990

4. Collection of charge on junction nodes from ion tracks;messenger;IEEE Transactions on Nuclear Science,1982

5. Exploring Multi-level Design to Mitigate Variability and Radiation Effects on 7nm FinFET Logic Cells

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