Design optimization of high bandwidth memory (HBM) interposer considering signal integrity

Author:

Cho Kyungjun,Lee Hyunsuk,Kim Heegon,Choi Sumin,Kim Youngwoo,Lim Jaemin,Kim Joungho,Kim Hyungsoo,Kim Yongju,Kim Yunsaing

Publisher

IEEE

Cited by 23 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Impact of Port Type in S-Parameter Extraction of Package and PCB High-Speed Interconnections;2024 IEEE 28th Workshop on Signal and Power Integrity (SPI);2024-05-12

2. Signal Integrity Design and Analysis of Redistribution Layer Interposer Channel with Diagonal Meshed Ground in Memory Interface of High Bandwidth Memory;2023 IEEE 32nd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS);2023-10-15

3. Shisha: Online Scheduling of CNN Pipelines on Heterogeneous Architectures;Parallel Processing and Applied Mathematics;2023

4. Thermal and Signal Integrity Co-Design and Verification of Embedded Cooling Structure With Thermal Transmission Line for High Bandwidth Memory Module;IEEE Transactions on Components, Packaging and Manufacturing Technology;2022-09

5. Optimization of 2.5D Organic Interposer Channel for Die and Chiplets;2022 IEEE 72nd Electronic Components and Technology Conference (ECTC);2022-05

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