Simulation Study of High-Speed Ge Photodetector Dark and Light Current Degradation
Author:
Affiliation:
1. Universite Grenoble Alpes, Universite Savoie Mont Blanc, CNRS, Grenoble INP, IMEP-LAHC, Grenoble, France
2. Wafer Level Reliability Test for CMOS Technologies, STMicroelectronics, Crolles, France
Funder
IPCEI
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Safety, Risk, Reliability and Quality,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/7298/9876000/09804797.pdf?arnumber=9804797
Reference11 articles.
1. Silicon Photonics R&D and Manufacturing on 300-mm Wafer Platform
2. Accelerated device degradation of high-speed Ge waveguide photodetectors;le?niewska;Proc Int Rel Phys Symp,2019
3. Technological guidelines for the design of tandem III-V nanowire on Si solar cells from opto-electrical simulations
4. Drain leakage current characteristics due to the band-to-band tunneling in LDD MOS devices
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