Processing-in-Memory Technology for Machine Learning: From Basic to ASIC-Reference-Cited by-同舟云学术

Processing-in-Memory Technology for Machine Learning: From Basic to ASIC

Published:2022-06 Issue:6 Volume:69 Page:2598-2603
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Taylor Brady¹^ORCID,Zheng Qilin¹,Li Ziru¹^ORCID,Li Shiyu¹^ORCID,Chen Yiran¹^ORCID

Affiliation:

1. Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA

Funder

Natural Science Foundation

Army Research Office

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

https://ieeexplore.ieee.org/ielam/8920/9786589/9759466-aam.pdf

Reference48 articles.

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4. An 89TOPS/W and 16.3 TOPS/mm 2 all-digital SRAM-based full-precision compute-in memory macro in 22nm for machine-learning edge applications;chih;Proc IEEE Int Solid-State Circuits Conf (ISSCC),2021

5. A 28nm 1Mb time-domain computing-in-memory 6T-SRAM macro with a 6.6 ns latency, 1241GOPS and 37.01 TOPS/W for 8b-MAC operations for edge-AI devices;wu;Proc IEEE Int Solid-State Circuits Conf (ISSCC),2022

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