Low-Complexity Precision-Scalable Multiply-Accumulate Unit Architectures for Deep Neural Network Accelerators
Author:
Affiliation:
1. School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, Shanghai, China
Funder
National Key Research and Development Program of China
National Natural Science Foundation of China
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/10083009/09997127.pdf?arnumber=9997127
Reference21 articles.
1. Quantization and Training of Neural Networks for Efficient Integer-Arithmetic-Only Inference
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3. HAWQ-V3: Dyadic neural network quantization;yao;Proc Int Conf Mach Learn,2021
4. BRECQ: Pushing the limit of post-training quantization by block reconstruction;li;Proc Int Conf Learn Represent,2021
5. When Sorting Network Meets Parallel Bitstreams: A Fault-Tolerant Parallel Ternary Neural Network Accelerator based on Stochastic Computing
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