Efficiency Evaluation of Scalable Multiply and Accumulate Architectures in DSP: A Comparative Study of LUT Based and LUT-Less Based Approaches
Author:
Affiliation:
1. Mohan Babu University,Electronics and Communication Engineering,Tirupati,Andhra Pradesh,India
2. BNM Institute of Technology,Electronics and Communication Engineering,Bangalore,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10467176/10467219/10467265.pdf?arnumber=10467265
Reference22 articles.
1. Low power compressor based MAC architecture for DSP applications
2. Fast Hardware Architecture for 2-D Separable Convolution Operations
3. Digital Filter Multiple Access PONs With DSP-Enabled Software Reconfigurability
4. Design and VLSI implementation of a digital audio-specific DSP core for MP3/AAC
5. FACCU: Enable Fast Accumulation for High-Speed DSP Systems
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