A 10-Bit 40-MS/s Pipelined ADC With a Wide Range Operating Temperature for WAVE Applications
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/6710266/06678186.pdf?arnumber=6678186
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Design of a 12-bit 30MS/s Pipeline ADC for Image Sensors;2024 4th International Conference on Electronics, Circuits and Information Engineering (ECIE);2024-05-24
2. An interstage gain calibration technique for pipelined ADCs exploiting complementary dithering and calibration windows detector;IEICE Electronics Express;2024-04-25
3. A Novel Architecture for 10-bit 40MSPS Low Power Pipelined ADC Using a Simultaneous Capacitor and Op-amp Sharing Technique;Silicon;2021-07-21
4. Background Calibration for Bit Weights in Pipelined ADCs Using Adaptive Dither Windows;IEEE Transactions on Circuits and Systems II: Express Briefs;2021-06
5. An 11-bit 50-MS/s Pipelined ADC using Circuit-sharing Techniques;JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE;2019-08-31
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