A 65-nm CMOS 6-Bit 20 GS/s Time-Interleaved DAC With Full-Binary Sub-DACs-Reference-Cited by-同舟云学术

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A 65-nm CMOS 6-Bit 20 GS/s Time-Interleaved DAC With Full-Binary Sub-DACs

Published:2018-09 Issue:9 Volume:65 Page:1154-1158
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Kim Si-Nai^ORCID,Kim Woo-Cheol,Seo Min-Jae^ORCID,Ryu Seung-Tak^ORCID

Funder

Ministry of Science, ICT and Future Planning

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/8447179/08303762.pdf?arnumber=8303762

Cited by 13 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Mirage: An RNS-Based Photonic Accelerator for DNN Training;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29

2. Wideband Vector Signal Generation Using Multiple Narrowband Phase-Coherent Synchronous Signal Channels;2024 103rd ARFTG Microwave Measurement Conference (ARFTG);2024-06-21

3. A 4-bit 28-GS/s 4×Time-Interleaved Current-Steering DAC for High-Speed Interfacing;2024 Panhellenic Conference on Electronics & Telecommunications (PACET);2024-03-28

4. Memristor-based storage system with convolutional autoencoder-based image compression network;Nature Communications;2024-02-07

5. Time-Interleaving Sigma–Delta Modulator-Based Digital-to-Analog Converter With Time Multiplexing in the Analog Domain;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-02

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