A 4-bit 28-GS/s 4×Time-Interleaved Current-Steering DAC for High-Speed Interfacing
Author:
Affiliation:
1. Aristotle University of Thessaloniki,Electronics Laboratory,Department of Physics,Greece,54124
2. Aristotle University of Thessaloniki,Electronics Laboratory,Department of Electrical and Computer Engineering,Greece,54124
Funder
Deutscher Akademischer Austauschdienst
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10496948/10496998/10497013.pdf?arnumber=10497013
Reference10 articles.
1. A modular 16NM Direct-RF TX/RX Embedding 9GS/S DAC and 4.5GS/S ADC with 90DB Isolation and Sub-80PS Channel Alignment for Monolithic Integration in 5G Base-Station SoC
2. Time-Shared DAC in SAR ADC for Tx Beamforming of Ultrasound Application
3. Quadrature Clock Generation Circuit for Time Interleaved Data Converters
4. A 65-nm CMOS 6-Bit 20 GS/s Time-Interleaved DAC With Full-Binary Sub-DACs
5. Calibration and Correction of Timing Mismatch Error in Two-Channel Time-Interleaved DACs
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