A Multi-Chain Merged Tapped Delay Line for High Precision Time-to-Digital Converters in FPGAs
Author:
Funder
National Natural Science Foundation of China
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/8237211/07913678.pdf?arnumber=7913678
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