Affiliation:
1. School of Microelectronics, and Engineering Research Center of Integrated Circuits for Next-Generation Communications, Ministry of Education, Southern University of Science and Technology, Shenzhen, China
Funder
National Natural Science Foundation of China (NSFC) Key Program
National Key Research and Development Program of the Ministry of Science and Technology
Shenzhen Science and Technology Program
NanShanQu KeJiChuangXinJu
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Cited by
9 articles.
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1. Hybrid Multi-tile Vector Systolic Architecture for Accelerating Convolution on FPGAs;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
2. A SIMD Dynamic Fixed Point Processing Engine for DNN Accelerators;2024 25th International Symposium on Quality Electronic Design (ISQED);2024-04-03
3. Flexible Systolic Array Platform on Virtual 2-D Multi-FPGA Plane;Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region;2024-01-18
4. A Low-Power DNN Accelerator With Mean-Error-Minimized Approximate Signed Multiplier;IEEE Open Journal of Circuits and Systems;2024
5. A Multi-Precision Floating-Point Multiplier Structure Applied to FPGA Embedded DSP;2023 6th International Conference on Artificial Intelligence and Pattern Recognition (AIPR);2023-09-22