A Low-Power DNN Accelerator With Mean-Error-Minimized Approximate Signed Multiplier-Reference-Cited by-同舟云学术

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A Low-Power DNN Accelerator With Mean-Error-Minimized Approximate Signed Multiplier

Published:2024 Issue: Volume:5 Page:57-68
ISSN:2644-1225
Container-title:IEEE Open Journal of Circuits and Systems
language:
Short-container-title:IEEE Open J. Circuits Syst.

Author:

Du Laimin¹^ORCID,Ni Leibin²^ORCID,Liu Xiong³,Peng Guanqi¹^ORCID,Li Kai¹^ORCID,Mao Wei¹^ORCID,Yu Hao¹^ORCID

Affiliation:

1. School of Microelectronics, Southern University of Science and Technology, Shenzhen, Guangdong, China

2. Advanced Computing and Storage Laboratory, Huawei Technologies Company Ltd., Shenzhen, Guangdong, China

3. School of Advanced Manufacturing, Fuzhou University, Fuzhou, Fujian, China

Funder

National Key Research and Development Program of the Ministry of Science and Technology

Guangdong Provincial Key Laboratory Program from the Department of Science and Technology of Guangdong Province

Shenzhen Science and Technology Program

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/8784029/10423923/10500495.pdf?arnumber=10500495

Reference40 articles.

1. Image Segmentation Using Deep Learning: A Survey

2. Focal Loss for Dense Object Detection

3. Energy-Efficient Convolutional Neural Networks via Recurrent Data Reuse

4. Design Considerations for Edge Neural Network Accelerators: An Industry Perspective

5. A Configurable Floating-Point Multiple-Precision Processing Element for HPC and AI Converged Computing

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