A Configurable Floating-Point Multiple-Precision Processing Element for HPC and AI Converged Computing

Author:

Mao WeiORCID,Li Kai,Cheng Quan,Dai Liuyao,Li Boyu,Xie Xinang,Li HeORCID,Lin LongyangORCID,Yu HaoORCID

Funder

Shenzhen Science and Technology Program

Innovative Team Program of Education Department of Guangdong Province

Key-Area Research and Development Program of Guangdong Province

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 19 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. ABS: Accumulation Bit-Width Scaling Method for Designing Low-Precision Tensor Core;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-09

2. A Low-Cost Floating-Point FMA Unit Supporting Package Operations for HPC-AI Applications;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-07

3. A Case for Low Bitwidth Floating Point Arithmetic on FPGA for Transformer Based DNN Inference;2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2024-05-27

4. A Reconfigurable Fused Multiply-Accumulate For Miscellaneous Operators in Deep Neural Network;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

5. HISPE: High-Speed Configurable Floating-Point Multi-Precision Processing Element;2024 25th International Symposium on Quality Electronic Design (ISQED);2024-04-03

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